Exemplary embodiments of the present disclosure relate to methods of fabricating a semiconductor device and, more particularly, to methods of fabricating a storage node in a semiconductor device and methods of fabricating a capacitor using the same.
As semiconductor devices become more highly integrated, a planar area of a unit cell of the semiconductor devices is reduced. Thus, when the highly integrated semiconductor devices are dynamic random access memory (DRAM) devices including cell capacitors, it may be difficult to obtain sufficient cell capacitance necessary for reliable operation of the DRAM devices. Accordingly, various technologies for reducing a thickness of a dielectric layer of the cell capacitors and/or for realizing three dimensional storage nodes have been developed to increase the cell capacitance in a limited planar area. For example, concave storage nodes or cylindrical storage nodes have been proposed for the three dimensional storage nodes.